Integrated circuit arrangements are produced with an ever higher packing density. The consequence of this is that interconnects in metallization levels are at an ever smaller distance from one another. As a result, capacitances formed between the interconnects rise and lead to high signal propagation times, high power loss and undesirable crosstalk, that is to say to an interaction between signals applied on adjacent interconnects.
Silicon oxide has a dielectric whose relative permittivity ∈r=3.9 is often used as insulation material between the interconnects.
In order to reduce the relative permittivity ∈r, which leads to a reduction of the value of the coupling capacitances between interconnects embedded into an insulation material, use is made of so-called low-k materials, that is to say materials having a low value ∈r as material for intermetal dielectrics.
It is also known from the prior art to produce cavities between interconnects within an interconnect level in order to reduce the value of the relative permittivity and thus the value of the coupling capacitance. The insulating dielectric that determines the capacitance between the interconnects has a relative permittivity ∈r which is approximately equal to one in the region of cavities. The interconnects themselves are surrounded by a material layer composed of silicon oxide or a low-k material for the purpose of decoupling from the surroundings.
The high coupling capacitances C between adjacent interconnects, which are becoming greater and greater in increasingly miniaturized circuits, lead, together with the resistance R of an interconnect, to an RC switching delay of signals transported on the interconnects. The RC switching delay can be reduced using air gaps as an alternative to low-k materials since the effective dielectric constant ∈r as insulation material between metallization tracks is considerably reduced when air gaps are used between interconnects. One possibility for the realization of air gaps is disclosed in, Arnal, V., et al., “Integration of a 3 Level Cu—SiO2 Air Gap Interconnect for Sub 0.1 micron CMOS Technologies”, Proceedings IITC 2001 (hereinafter “Arnal”), for example.
Consequently, air gaps can be used for reducing the parasitic capacitance between metal tracks. However, a series of problems arise in the production of air gaps. Air gaps can be produced by means of a non-conformal deposition of a dielectric onto the metal tracks, interspaces between adjacent interconnects partly remaining free of material. The air gaps are extended in very long fashion as a result, however. As a result, there is the risk of a conflict with an overlying metallization level, for example when opening the air gaps in a CMP method step (“chemical mechanical polishing”), see Arnal.
Furthermore, there is a problem with air gap structures in accordance with the prior art in that during the formation of a dielectric cover layer for covering interconnects, dielectric material can pass into regions between adjacent interconnects in an undesirable manner, that is to say can fill air gaps, which runs counter to the formation of an intermetal dielectric having a low k value.
DE 101 25 019 A1 discloses a cavity structure in which interconnects are formed as laterally delimited layer sequences on the surface of a substrate and are covered with a cover layer such that cavities are formed between adjacent interconnects.
DE 102 46 830 A1 describes a method for copper metallization, wherein uncovered regions between copper interconnects are filled with an insulator layer, wherein voids form in the insulator layer in the filled regions between the copper interconnects.
U.S. Pat. No. 6,524,948 B2 describes a semiconductor device and a method for producing the same, wherein firstly, by means of an etching step, trenches extending through a first layer, which essentially comprises insulating material, and an underlying second layer comprising conductive material are formed in such a way that a conductor structure with interspaces forms in the second layer, and an insulating layer is subsequently formed over the first and second layers in such a way that air gaps form in the interspaces.